Improvements on configuration

Frequency can be set with value not with register values.
Coding rate and CRC can be configured during setup.
This commit is contained in:
Wojciech Domski 2020-08-26 11:05:42 +02:00
parent db571ac6da
commit 20956f7da2
2 changed files with 71 additions and 82 deletions

View File

@ -82,7 +82,7 @@ void SX1278_SPIWrite(SX1278_t * module, uint8_t addr, uint8_t cmd) {
SX1278_hw_SetNSS(module->hw, 1);
}
void SX1278_SPIBurstRead(SX1278_t * module, uint8_t addr, uint8_t* rxBuf,
void SX1278_SPIBurstRead(SX1278_t * module, uint8_t addr, uint8_t * rxBuf,
uint8_t length) {
uint8_t i;
if (length <= 1) {
@ -97,7 +97,7 @@ void SX1278_SPIBurstRead(SX1278_t * module, uint8_t addr, uint8_t* rxBuf,
}
}
void SX1278_SPIBurstWrite(SX1278_t * module, uint8_t addr, uint8_t* txBuf,
void SX1278_SPIBurstWrite(SX1278_t * module, uint8_t addr, uint8_t * txBuf,
uint8_t length) {
unsigned char i;
if (length <= 1) {
@ -112,37 +112,38 @@ void SX1278_SPIBurstWrite(SX1278_t * module, uint8_t addr, uint8_t* txBuf,
}
}
void SX1278_defaultConfig(SX1278_t * module) {
SX1278_config(module, module->frequency, module->power, module->LoRa_Rate,
module->LoRa_BW);
}
void SX1278_config(SX1278_t * module, uint8_t frequency, uint8_t power,
uint8_t LoRa_Rate, uint8_t LoRa_BW) {
void SX1278_config(SX1278_t * module) {
SX1278_sleep(module); //Change modem mode Must in Sleep mode
SX1278_hw_DelayMs(15);
SX1278_entryLoRa(module);
//SX1278_SPIWrite(module, 0x5904); //?? Change digital regulator form 1.6V to 1.47V: see errata note
SX1278_SPIBurstWrite(module, LR_RegFrMsb,
(uint8_t*) SX1278_Frequency[frequency], 3); //setting frequency parameter
uint64_t freq = ((uint64_t) module->frequency << 19) / 32000000;
uint8_t freq_reg[3];
freq_reg[0] = (uint8_t) (freq >> 16);
freq_reg[1] = (uint8_t) (freq >> 8);
freq_reg[2] = (uint8_t) (freq >> 0);
SX1278_SPIBurstWrite(module, LR_RegFrMsb, (uint8_t*) freq_reg, 3); //setting frequency parameter
SX1278_SPIWrite(module, RegSyncWord, 0x34);
//setting base parameter
SX1278_SPIWrite(module, LR_RegPaConfig, SX1278_Power[power]); //Setting output power parameter
SX1278_SPIWrite(module, LR_RegPaConfig, SX1278_Power[module->power]); //Setting output power parameter
SX1278_SPIWrite(module, LR_RegOcp, 0x0B); //RegOcp,Close Ocp
SX1278_SPIWrite(module, LR_RegLna, 0x23); //RegLNA,High & LNA Enable
if (SX1278_SpreadFactor[LoRa_Rate] == 6) { //SFactor=6
if (SX1278_SpreadFactor[module->LoRa_Rate] == 6) { //SFactor=6
uint8_t tmp;
SX1278_SPIWrite(module,
LR_RegModemConfig1,
((SX1278_LoRaBandwidth[LoRa_BW] << 4) + (SX1278_CR << 1) + 0x01)); //Implicit Enable CRC Enable(0x02) & Error Coding rate 4/5(0x01), 4/6(0x02), 4/7(0x03), 4/8(0x04)
((SX1278_LoRaBandwidth[module->LoRa_BW] << 4) + (SX1278_CodingRate[module->LoRa_CR] << 1)
+ 0x01)); //Implicit Enable CRC Enable(0x02) & Error Coding rate 4/5(0x01), 4/6(0x02), 4/7(0x03), 4/8(0x04)
SX1278_SPIWrite(module,
LR_RegModemConfig2,
((SX1278_SpreadFactor[LoRa_Rate] << 4) + (SX1278_CRC << 2)
+ 0x03));
((SX1278_SpreadFactor[module->LoRa_Rate] << 4)
+ (SX1278_CRC_Sum[module->LoRa_CRC_sum] << 2) + 0x03));
tmp = SX1278_SPIRead(module, 0x31);
tmp &= 0xF8;
@ -152,17 +153,19 @@ void SX1278_config(SX1278_t * module, uint8_t frequency, uint8_t power,
} else {
SX1278_SPIWrite(module,
LR_RegModemConfig1,
((SX1278_LoRaBandwidth[LoRa_BW] << 4) + (SX1278_CR << 1) + 0x00)); //Explicit Enable CRC Enable(0x02) & Error Coding rate 4/5(0x01), 4/6(0x02), 4/7(0x03), 4/8(0x04)
((SX1278_LoRaBandwidth[module->LoRa_BW] << 4) + (SX1278_CodingRate[module->LoRa_CR] << 1)
+ 0x00)); //Explicit Enable CRC Enable(0x02) & Error Coding rate 4/5(0x01), 4/6(0x02), 4/7(0x03), 4/8(0x04)
SX1278_SPIWrite(module,
LR_RegModemConfig2,
((SX1278_SpreadFactor[LoRa_Rate] << 4) + (SX1278_CRC << 2)
+ 0x03)); //SFactor & LNA gain set by the internal AGC loop
((SX1278_SpreadFactor[module->LoRa_Rate] << 4)
+ (SX1278_CRC_Sum[module->LoRa_CRC_sum] << 2) + 0x00)); //SFactor & LNA gain set by the internal AGC loop
}
SX1278_SPIWrite(module, LR_RegSymbTimeoutLsb, 0xFF); //RegSymbTimeoutLsb Timeout = 0x3FF(Max)
SX1278_SPIWrite(module, LR_RegModemConfig3, 0x04);
SX1278_SPIWrite(module, LR_RegSymbTimeoutLsb, 0x08); //RegSymbTimeoutLsb Timeout = 0x3FF(Max)
SX1278_SPIWrite(module, LR_RegPreambleMsb, 0x00); //RegPreambleMsb
SX1278_SPIWrite(module, LR_RegPreambleLsb, 12); //RegPreambleLsb 8+4=12byte Preamble
SX1278_SPIWrite(module, LR_RegPreambleLsb, 8); //RegPreambleLsb 8+4=12byte Preamble
SX1278_SPIWrite(module, REG_LR_DIOMAPPING2, 0x01); //RegDioMapping2 DIO5=00, DIO4=01
module->readBytes = 0;
SX1278_standby(module); //Entry standby mode
@ -191,7 +194,7 @@ int SX1278_LoRaEntryRx(SX1278_t * module, uint8_t length, uint32_t timeout) {
module->packetLength = length;
SX1278_defaultConfig(module); //Setting base parameter
SX1278_config(module); //Setting base parameter
SX1278_SPIWrite(module, REG_LR_PADAC, 0x84); //Normal and RX
SX1278_SPIWrite(module, LR_RegHopPeriod, 0xFF); //No FHSS
SX1278_SPIWrite(module, REG_LR_DIOMAPPING1, 0x01);//DIO=00,DIO1=00,DIO2=00, DIO3=01
@ -211,7 +214,7 @@ int SX1278_LoRaEntryRx(SX1278_t * module, uint8_t length, uint32_t timeout) {
}
if (--timeout == 0) {
SX1278_hw_Reset(module->hw);
SX1278_defaultConfig(module);
SX1278_config(module);
return 0;
}
SX1278_hw_DelayMs(1);
@ -247,7 +250,7 @@ int SX1278_LoRaEntryTx(SX1278_t * module, uint8_t length, uint32_t timeout) {
module->packetLength = length;
SX1278_defaultConfig(module); //setting base parameter
SX1278_config(module); //setting base parameter
SX1278_SPIWrite(module, REG_LR_PADAC, 0x87); //Tx for 20dBm
SX1278_SPIWrite(module, LR_RegHopPeriod, 0x00); //RegHopPeriod NO FHSS
SX1278_SPIWrite(module, REG_LR_DIOMAPPING1, 0x41); //DIO0=01, DIO1=00,DIO2=00, DIO3=01
@ -266,13 +269,13 @@ int SX1278_LoRaEntryTx(SX1278_t * module, uint8_t length, uint32_t timeout) {
if (--timeout == 0) {
SX1278_hw_Reset(module->hw);
SX1278_defaultConfig(module);
SX1278_config(module);
return 0;
}
}
}
int SX1278_LoRaTxPacket(SX1278_t * module, uint8_t* txBuffer, uint8_t length,
int SX1278_LoRaTxPacket(SX1278_t * module, uint8_t * txBuffer, uint8_t length,
uint32_t timeout) {
SX1278_SPIBurstWrite(module, 0x00, txBuffer, length);
SX1278_SPIWrite(module, LR_RegOpMode, 0x8b); //Tx Mode
@ -286,25 +289,27 @@ int SX1278_LoRaTxPacket(SX1278_t * module, uint8_t* txBuffer, uint8_t length,
if (--timeout == 0) {
SX1278_hw_Reset(module->hw);
SX1278_defaultConfig(module);
SX1278_config(module);
return 0;
}
SX1278_hw_DelayMs(1);
}
}
void SX1278_begin(SX1278_t * module, uint8_t frequency, uint8_t power,
uint8_t LoRa_Rate, uint8_t LoRa_BW, uint8_t packetLength) {
void SX1278_init(SX1278_t * module, uint64_t frequency, uint8_t power,
uint8_t LoRa_Rate, uint8_t LoRa_BW, uint8_t LoRa_CR, uint8_t LoRa_CRC_sum, uint8_t packetLength) {
SX1278_hw_init(module->hw);
module->frequency = frequency;
module->power = power;
module->LoRa_Rate = LoRa_Rate;
module->LoRa_BW = LoRa_BW;
module->LoRa_CR = LoRa_CR;
module->LoRa_CRC_sum = LoRa_CRC_sum;
module->packetLength = packetLength;
SX1278_defaultConfig(module);
SX1278_config(module);
}
int SX1278_transmit(SX1278_t * module, uint8_t* txBuf, uint8_t length,
int SX1278_transmit(SX1278_t * module, uint8_t * txBuf, uint8_t length,
uint32_t timeout) {
if (SX1278_LoRaEntryTx(module, length, timeout)) {
return SX1278_LoRaTxPacket(module, txBuf, length, timeout);
@ -320,7 +325,7 @@ uint8_t SX1278_available(SX1278_t * module) {
return SX1278_LoRaRxPacket(module);
}
uint8_t SX1278_read(SX1278_t * module, uint8_t* rxBuf, uint8_t length) {
uint8_t SX1278_read(SX1278_t * module, uint8_t * rxBuf, uint8_t length) {
if (length != module->readBytes)
length = module->readBytes;
memcpy(rxBuf, module->rxBuffer, length);

View File

@ -15,34 +15,6 @@
#define SX1278_MAX_PACKET 256
#define SX1278_DEFAULT_TIMEOUT 3000
//Error Coding rate (CR)setting
#define SX1278_CR_4_5
//#define SX1278_CR_4_6
//#define SX1278_CR_4_7
//#define SX1278_CR_4_8
#ifdef SX1278_CR_4_5
#define SX1278_CR 0x01
#else
#ifdef SX1278_CR_4_6
#define SX1278_CR 0x02
#else
#ifdef SX1278_CR_4_7
#define SX1278_CR 0x03
#else
#ifdef SX1278_CR_4_8
#define SX1278_CR 0x04
#endif
#endif
#endif
#endif
//CRC Enable
#define SX1278_CRC_EN
#ifdef SX1278_CRC_EN
#define SX1278_CRC 0x01
#else
#define SX1278_CRC 0x00
#endif
//RFM98 Internal registers Address
/********************LoRa mode***************************/
#define LR_RegFifo 0x00
@ -83,6 +55,7 @@
#define LR_RegMaxPayloadLength 0x23
#define LR_RegHopPeriod 0x24
#define LR_RegFifoRxByteAddr 0x25
#define LR_RegModemConfig3 0x26
// I/O settings
#define REG_LR_DIOMAPPING1 0x40
#define REG_LR_DIOMAPPING2 0x41
@ -154,6 +127,7 @@
#define RegSeqConfig2 0x37
#define RegTimerResol 0x38
#define RegTimer1Coef 0x39
#define RegSyncWord 0x39
#define RegTimer2Coef 0x3a
#define RegImageCal 0x3b
#define RegTemp 0x3c
@ -170,10 +144,6 @@
/**********************************************************
**Parameter table define
**********************************************************/
#define SX1278_433MHZ 0
static const uint8_t SX1278_Frequency[1][3] = { { 0x6C, 0x80, 0x00 }, //434MHz
};
#define SX1278_POWER_20DBM 0
#define SX1278_POWER_17DBM 1
@ -219,6 +189,20 @@ static const uint8_t SX1278_LoRaBandwidth[10] = { 0, // 7.8KHz,
9 // 500.0KHz
};
//Coding rate
#define SX1278_LORA_CR_4_5 0
#define SX1278_LORA_CR_4_6 1
#define SX1278_LORA_CR_4_7 2
#define SX1278_LORA_CR_4_8 3
static const uint8_t SX1278_CodingRate[4] = { 0x01, 0x02, 0x03, 0x04};
//CRC Enable
#define SX1278_LORA_CRC_EN 0
#define SX1278_LORA_CRC_DIS 1
static const uint8_t SX1278_CRC_Sum[2] = { 0x01, 0x00};
typedef enum _SX1278_STATUS {
SLEEP, STANDBY, TX, RX
} SX1278_Status_t;
@ -238,10 +222,12 @@ typedef struct {
typedef struct {
SX1278_hw_t * hw;
uint8_t frequency;
uint64_t frequency;
uint8_t power;
uint8_t LoRa_Rate;
uint8_t LoRa_BW;
uint8_t LoRa_CR;
uint8_t LoRa_CRC_sum;
uint8_t packetLength;
SX1278_Status_t status;
@ -251,44 +237,42 @@ typedef struct {
} SX1278_t;
//hardware
__weak void SX1278_hw_init(SX1278_hw_t * hw);
__weak void SX1278_hw_SetNSS(SX1278_hw_t * hw, int value);
__weak void SX1278_hw_Reset(SX1278_hw_t * hw);
__weak void SX1278_hw_SPICommand(SX1278_hw_t * hw, uint8_t cmd);
__weak uint8_t SX1278_hw_SPIReadByte(SX1278_hw_t * hw);
__weak void SX1278_hw_DelayMs(uint32_t msec);
__weak int SX1278_hw_GetDIO0(SX1278_hw_t * hw);
void SX1278_hw_init(SX1278_hw_t * hw);
void SX1278_hw_SetNSS(SX1278_hw_t * hw, int value);
void SX1278_hw_Reset(SX1278_hw_t * hw);
void SX1278_hw_SPICommand(SX1278_hw_t * hw, uint8_t cmd);
uint8_t SX1278_hw_SPIReadByte(SX1278_hw_t * hw);
void SX1278_hw_DelayMs(uint32_t msec);
int SX1278_hw_GetDIO0(SX1278_hw_t * hw);
//logic
uint8_t SX1278_SPIRead(SX1278_t * module, uint8_t addr);
void SX1278_SPIWrite(SX1278_t * module, uint8_t addr, uint8_t cmd);
void SX1278_SPIBurstRead(SX1278_t * module, uint8_t addr, uint8_t *rxBuf,
void SX1278_SPIBurstRead(SX1278_t * module, uint8_t addr, uint8_t * rxBuf,
uint8_t length);
void SX1278_SPIBurstWrite(SX1278_t * module, uint8_t addr, uint8_t *txBuf,
void SX1278_SPIBurstWrite(SX1278_t * module, uint8_t addr, uint8_t * txBuf,
uint8_t length);
void SX1278_DIO0_InterruptHandler(SX1278_t * module);
void SX1278_config(SX1278_t * module, uint8_t frequency, uint8_t power,
uint8_t LoRa_Rate, uint8_t LoRa_BW);
void SX1278_defaultConfig(SX1278_t * module);
void SX1278_config(SX1278_t * module);
void SX1278_entryLoRa(SX1278_t * module);
void SX1278_clearLoRaIrq(SX1278_t * module);
int SX1278_LoRaEntryRx(SX1278_t * module, uint8_t length, uint32_t timeout);
uint8_t SX1278_LoRaRxPacket(SX1278_t * module);
int SX1278_LoRaEntryTx(SX1278_t * module, uint8_t length, uint32_t timeout);
int SX1278_LoRaTxPacket(SX1278_t * module, uint8_t *txBuf, uint8_t length,
int SX1278_LoRaTxPacket(SX1278_t * module, uint8_t * txBuf, uint8_t length,
uint32_t timeout);
void SX1278_begin(SX1278_t * module, uint8_t frequency, uint8_t power,
uint8_t LoRa_Rate, uint8_t LoRa_BW, uint8_t packetLength);
void SX1278_init(SX1278_t * module, uint64_t frequency, uint8_t power,
uint8_t LoRa_Rate, uint8_t LoRa_BW, uint8_t LoRa_CR, uint8_t LoRa_CRC_sum, uint8_t packetLength);
int SX1278_transmit(SX1278_t * module, uint8_t *txBuf, uint8_t length,
int SX1278_transmit(SX1278_t * module, uint8_t * txBuf, uint8_t length,
uint32_t timeout);
int SX1278_(SX1278_t * module, uint8_t length, uint32_t timeoutT);
uint8_t SX1278_available(SX1278_t * module);
uint8_t SX1278_read(SX1278_t * module, uint8_t *rxBuf, uint8_t length);
uint8_t SX1278_read(SX1278_t * module, uint8_t * rxBuf, uint8_t length);
uint8_t SX1278_RSSI_LoRa(SX1278_t * module);
uint8_t SX1278_RSSI(SX1278_t * module);